CPython Support for RISC-V Platforms

Key Takeaways:

• Tier 3 status means the port is official and regression-tested, but failures do not block a Python release, the commitment is “maintained,” not “release-critical.”
• The stable Python 3.14.7 (August 5, 2026) already runs on RISC-V Linux; the main branch targeting Python 3.16 carries the current tier list.
• Real RISC-V boards still trail ARM and x86 on CPU-bound Python workloads, so Tier 3 is a software-maturity milestone, not a performance one.

What Tier 3 Actually Means

“Officially supported” has a specific meaning in the Python community. PEP 11 defines how a platform gains support in CPython, which platforms are supported, and the process for removing support. It sets out three tiers, each with different expectations. Tier 3, where RISC-V is placed, requires three things: a reliable buildbot, at least one core developer assigned to support the platform, and no service-level agreement to respond to failures. Importantly, failures on Tier 3 platforms do not block a release.

This last point distinguishes “officially supported” from “release-critical.” Tier 1 platforms, such as Linux on 64-bit Intel with GCC, block a release if they break, all core developers share responsibility for keeping them working, and any breakage is fixed or reverted immediately. Tier 3 platforms have a buildbot that flags breakage and a maintainer expected to fix issues, but a broken RISC-V build will not delay a Python 3.16 release. For developers, this is a clear and realistic commitment: the port is monitored and maintained, but it is not the reason a release would be held up.

The PEP also describes governance for tier changes. A platform moves up a tier only with steering council approval, based on team consensus. Demotion occurs if a platform fails to meet its tier’s requirements for a long period, as judged by the release manager or steering council. If a platform loses all tier status by the first beta of a new feature release, the community is notified of its pending removal. This process means the RISC-V entry is not a one-time designation, it requires the buildbot to keep passing or the port will be demoted.

RISC-V shares Tier 3 with platforms like aarch64-linux-android, arm64-apple-ios, s390x-unknown-linux-gnu, wasm32-unknown-emscripten, and x86_64-unknown-freebsd. What stands out is that RISC-V reached this level despite the uneven state of its software support. For example, Google’s Android Common Kernel is removing RISC-V support entirely, as reported by Android Authority. Python formalizing the port instead of letting it remain an unsupported patch set shows that maintainers recognize enough active RISC-V users to justify ongoing maintenance.

The Full Tier Ladder

PEP 11’s tier ladder reflects how much the core team supports each platform. The table below summarizes the current tiers, with RISC-V in Tier 3.

These tier definitions come directly from PEP 11. The difference between Tier 2 and Tier 3 is subtle but important. Tier 2 requires at least two core developers and, like Tier 1, failures block a release. Tier 3 requires only one maintainer and does not block releases on failure. The RISC-V port has a single named maintainer (plus a second contact), which is less support than the aarch64 Linux clang build, but it is a documented commitment rather than an unsupported platform with no guarantees.

Platforms outside any tier receive no development or testing from the core team and have no guarantee that Python will work. Unsupported code that causes maintenance issues can be removed without a deprecation process. RISC-V avoided this fate by earning a tier slot. The practical difference between “unsupported” and “Tier 3” is that unsupported platforms can degrade silently, while Tier 3 platforms have a buildbot that reports failures and a maintainer responsible for addressing them.

Building CPython on RISC-V

Building CPython on RISC-V Linux uses the same ./configure and make commands as on other Unix-like systems. The Python Developer’s Guide documents the standard build process, which works on RISC-V boards running Debian or Red Hat derivatives. The core interpreter requires only a C11 compiler, so the build process is straightforward.

# On a RISC-V Linux board (e.g. Milk-V Jupiter, Orange Pi RV2)
git clone https://github.com/python/cpython.git
cd cpython
./configure --enable-optimizations
make -s -j $(nproc)
./python --version

The --enable-optimizations flag enables Profile Guided Optimization (PGO), which builds an instrumented interpreter, runs a training workload to collect execution profiles, then rebuilds the final binary using that profile. The guide notes this is important for accurate benchmarks but not necessary for everyday development, the instrumented binary is not suitable for production because it contains profiling instructions. For most contributors, a pydebug build is a better starting point:

Note: The following code is an illustrative example and has not been verified against official documentation. Please refer to the official docs for production-ready code.

./configure --with-pydebug
make -s -j $(nproc)
# Note: production use should skip --with-pydebug; it enables
# extra sanity checks that slow execution significantly.
make test

The Tier 3 buildbot required by PEP 11 runs this kind of build continuously, so any commit that breaks RISC-V will appear in the Tier 3 buildbot status before a user on a board reports it. This provides regression coverage before cloning the repo. The build uses make -j $(nproc) to parallelize compilation across cores, balancing RAM use and build time on boards with limited memory.

One limitation applies to any constrained board: not all optional standard-library modules build everywhere. The configure step reports missing modules near the end of make, and modules like tkinter require Tcl/Tk headers that a minimal RISC-V image may lack. The core interpreter builds with only a C11 compiler, but the full standard library depends on additional libraries. If cross-compiling rather than building natively, the guide recommends the same configure/make flow designed for that use case.

How the Interpreter Behaves on RISC-V

RISC-V support expands the CPUs that can run Python natively but does not change the interpreter’s operation. CPython compiles Python code to bytecode and interprets it, and the global interpreter lock (GIL) still ensures only one thread executes Python bytecode per process regardless of architecture. This means concurrency on RISC-V works the same as on x86_64: one thread runs Python bytecode at a time, and CPU-bound parallelism requires separate processes using the multiprocessing module.

Recent performance improvements also apply. Python 3.11 introduced the specializing adaptive interpreter, which the CPython Wikipedia entry notes runs about 25 percent faster on average than 3.10 according to the pyprf benchmark suite. This mechanism specializes frequently executed instructions that show stable types into faster, type-specific instructions, then reverses specialization when needed. It works independently of architecture and applies to RISC-V the same way. The experimental Just-in-Time compiler, built on LLVM and merged into the main branch in 2024, is also architecture-independent but remains disabled by default and requires an explicit configure flag.

The main architectural difference appears in the C toolchain. The PEP 11 entry for RISC-V lists both glibc with clang and glibc with gcc as supported configurations, giving distribution maintainers flexibility in building the port. Supporting both compilers is more coverage than some other Tier 3 platforms have, and it matters because RISC-V toolchains have historically lagged behind x86_64 and aarch64. A port that builds cleanly with both compilers is less likely to break when toolchains evolve.

Hardware and Performance Reality

Support status does not reflect speed, and RISC-V boards are slower than typical desktops. A 2025 comparison of five RISC-V single-board computers by Explaining Computers showed performance varies widely by board and workload. The Milk-V Jupiter led real-world image-processing tasks, and the Orange Pi RV2 was the most power-efficient under load at about 6.2 watts, while the Milk-V Jupiter peaked at 10.1 watts. Synthetic benchmarks like Geekbench 6 revealed inconsistency, with some boards failing to complete the test.

For Python, this means the interpreter runs, but CPU-bound workloads on current RISC-V silicon will be slower than on comparable ARM or x86 boards. This fits the broader pattern that Python is usually used at a high level, delegating CPU-intensive work to C libraries that bypass the GIL. On RISC-V, those native libraries also need RISC-V builds, so the practical experience depends on how many of your dependencies have native RISC-V wheels.

The hardware is improving. The same comparison noted that the Milk-V Jupiter and Banana Pi BPI F3 have strong compatibility with Debian and Red Hat, the two distributions most likely to package CPython. As these distributions add RISC-V as a primary target, installing Python will become apt install python3 rather than requiring a source build. That is the practical benefit of the official port: distribution maintainers have a supported upstream to package instead of carrying patches themselves.

The Packaging and Wheels Problem

An official CPython port is necessary but not enough for production Python on RISC-V. Most third-party packages with compiled extensions (data-science libraries, native bindings, anything with a C or Rust core) require RISC-V wheels built for the interpreter. This packaging work is ongoing alongside the interpreter port but is behind it. If your stack is pure Python, the port is immediately usable; if it depends on compiled extensions, you need to verify wheel availability for your packages before committing.

The interpreter’s build requirements explain why this is complex. Building the full standard library requires third-party libraries (libffi for ctypes, OpenSSL for ssl and hashlib, SQLite, zlib, and others) each must be available for RISC-V before the corresponding module builds. The configure step silently skips modules whose dependencies are missing, so a “working” Python on a minimal RISC-V image may lack modules you rely on. Distribution packages solve this by building against curated dependencies; building from source leaves the responsibility to you.

The configure documentation lists minimum versions for these dependencies, and the Developer’s Guide has the full list for building all modules. For RISC-V developers, the interpreter port is the straightforward part; the ecosystem of native wheels is the longer process and where most friction remains. How to Use Tether for Messaging on Linux provides a similar example of how tooling for a niche platform can become practical through clear documentation and community effort, much like the RISC-V port’s path.

Trade-offs and What to Watch

The main trade-off is between commitment and speed. Tier 3 means RISC-V is maintained but not release-critical, so a regression might remain until the maintainer addresses it rather than blocking a release. For most users, the port is stable enough to build and run now, but it is not held to the same standard as the x86_64 Linux build that most of the ecosystem uses. The single-maintainer model also concentrates risk: if Stan Ulbrych steps down and no one replaces them, the port’s tier status could be at risk.

Another trade-off is wheel availability, as discussed above. Performance is a third: the port’s official status does not make current RISC-V silicon competitive with ARM or x86 for CPU-bound Python, and anyone expecting faster speeds will be disappointed. The port’s value lies in compatibility and long-term support, not raw speed.

Watch whether the RISC-V port maintains Tier 3 status through the Python 3.16 release cycle and whether Debian and Red Hat packages ship CPython binaries for RISC-V on the same schedule as other architectures. The port is official as of 2026; its adoption depends on the packaging ecosystem and whether enough boards reach developers to keep the buildbot active. The contrast with Android’s kernel decision shows the outcome is not fixed, formal support can be granted and later withdrawn, depending on whether an active user community sustains the port. Building self-improving AI agents also depends on ongoing community investment in tooling and infrastructure, a pattern similar to the RISC-V port’s future.

Related Reading

More in-depth coverage from this blog on closely related topics:

• How to Use Tether for Messaging on Linux
• How to Build Self-Improving AI Agents

Sources and References

Sources cited while researching and writing this article:

• PEP 11 – CPython platform support | peps.python.org
• Setup and building – Python Developer’s Guide
• Tier 3 buildbot status
• CPython – Wikipedia
• 3. Configure Python — Python 3.14.7 documentation