Top Memory Manufacturers for AI

Samsung Electronics leads the broader DRAM market with a 38.6% revenue share, but SK Hynix controls the memory segment most directly tied to high-end AI inference, holding about 58% of high-bandwidth memory in the first quarter of 2026. Micron ranks third in overall DRAM and shares second place in HBM, while Samsung remains the largest NAND supplier. These rankings show why “memory market share” cannot be reduced to one leaderboard: HBM, DDR5, GDDR, LPDDR, and NAND perform different jobs and have different competitive structures.

The distinction matters for investors and infrastructure buyers because AI inference depends on an entire memory hierarchy. HBM feeds accelerator cores. DDR5 supports CPUs, retrieval systems, request scheduling, and overflow data. GDDR provides a lower-cost route to board-level accelerator bandwidth. LPDDR reduces power use in edge devices and tightly integrated data-center processors. NAND flash retains model files, databases, and persistent context after power is removed.

The financial stakes have risen with that technical dependence. Global DRAM revenue reached a record $97.1 billion in the first quarter of 2026, up 85.3% from the preceding quarter, based on Omdia figures reported by TechTimes. Conventional DRAM contract prices rose about 90% to 95% quarter over quarter during the period, according to TrendForce. The same capacity contest has affected server memory, graphics memory, mobile DRAM, and enterprise SSDs.

Key Takeaways:

• SK Hynix led HBM with approximately 58% share in the first quarter of 2026, compared with about 21% each for Samsung and Micron.
• Samsung led total DRAM revenue with 38.6%, followed by SK Hynix at 28.8% and Micron at 22.4%, according to Omdia.
• Samsung held 25% of NAND shipments in the second quarter of 2026, followed by SK Hynix at 22%, YMTC at 14%, and Micron at 13%, based on Counterpoint Research figures.
• HBM consumes roughly three times the wafer capacity per saleable bit as DDR5, so increasing HBM output reduces capacity available for conventional memory.
• GDDR7 and LPDDR5X are gaining importance because lower-cost inference cards and power-limited systems cannot use HBM for every workload.
• Market shares for GDDR and LPDDR are less frequently published as separate quarterly revenue tables. Samsung, SK Hynix, and Micron remain the principal suppliers, with their total DRAM shares providing the clearest public benchmark for manufacturing scale.

How the AI Inference Memory Hierarchy Works

Inference begins when a deployed model receives input and produces output. The hardware must load model weights, process the prompt, retain attention data, generate tokens, and preserve any context required for later requests. Each stage places different demands on capacity, bandwidth, latency, power, and data retention.

HBM sits closest to premium GPUs and AI accelerators. Its main job is to move model weights and other active data to compute units at very high speed. DDR5 sits behind the CPU and holds operating-system data, retrieval working sets, request queues, networking buffers, and data that cannot remain on the accelerator. GDDR attaches directly to a graphics or inference card but uses separate memory packages around the processor rather than vertical stacks on an advanced interposer.

LPDDR emphasizes bandwidth per watt and compact packaging. It has traditionally been associated with smartphones and laptops, but processors such as Nvidia’s Grace-class parts have brought low-power DRAM into data-center systems. NAND is persistent storage. It loads models and datasets into faster memory tiers and can store context or key-value cache data that has been moved out of DRAM.

The technologies are complementary. A server can contain an HBM-equipped accelerator, DDR5 CPU memory, and NAND-based NVMe SSDs at the same time. An edge system can pair LPDDR5X with NAND, while a lower-cost inference card can use GDDR7 instead of HBM. The correct design depends on whether the workload is limited by bandwidth, capacity, power, latency, or component cost.

Memory Type Comparison and Market Leaders

The table below separates market-share figures from technical descriptions. The HBM, conventional DRAM, and NAND rows use recent category-specific figures. Published GDDR7 and LPDDR5X data identify the major producers and market conditions but do not provide a comparable quarterly supplier split, so their rows use the top three companies’ first-quarter 2026 total DRAM shares as a manufacturing-scale reference. Those percentages should not be interpreted as GDDR-only or LPDDR-only shares.

The table also shows why a company can lead one market while trailing another. Samsung has the greatest scale across conventional DRAM and NAND. SK Hynix has the strongest position in accelerator memory. Micron has a smaller total DRAM share than its Korean competitors but has reached approximate parity with Samsung in HBM. Kioxia and SanDisk matter in NAND but do not produce DRAM or HBM.

HBM3E, HBM4, and the Accelerator Memory Race

HBM differs physically from standard DRAM because its dies are stacked instead of being distributed across a DIMM or circuit board. Thousands of vertical electrical connections pass through the stacked dies. The completed stack is installed beside the GPU or accelerator on an advanced package, allowing a very wide interface between compute and memory.

This layout provides high aggregate bandwidth and short data paths, both of which matter when inference repeatedly reads model weights. During token generation, accelerator cores can perform calculations faster than conventional off-package memory can deliver the required data. HBM reduces that imbalance. It also carries higher manufacturing and packaging costs, has more demanding thermal requirements, and depends on advanced assembly capacity.

HBM3E remains the memory generation associated with high-end accelerators such as Nvidia Blackwell and AMD’s MI325X and MI350-class products. AMD lists the MI350 series with up to 288GB of HBM3E and peak theoretical memory bandwidth of 8TB/s. The HBM4 standard widens the interface to 2,048 bits. Micron has said its HBM4 can deliver more than 2.8TB/s per stack and over 20% better power efficiency than its HBM3E, while Samsung announced 12-layer HBM4 stacks with capacities from 24GB to 36GB and claimed up to 3.3TB/s per stack.

These are vendor specifications rather than independent system benchmarks. Actual inference performance also depends on accelerator design, model architecture, quantization, batch size, context length, and software scheduling. HBM bandwidth alone does not guarantee high application throughput, but insufficient bandwidth can leave expensive compute units waiting for data.

SK Hynix: The HBM Leader

SK Hynix held approximately 58% of HBM in the first quarter of 2026, according to Counterpoint Research. Its share was down from 69% in the comparable 2025 period, showing that Samsung and Micron are gaining ground even while SK Hynix retains a large lead.

The company’s product mix has also translated into stronger profitability. TechTimes reported that SK Hynix recorded an operating margin of approximately 72% in the first quarter of 2026, citing its concentration in HBM and the higher margins associated with that product. Samsung led total DRAM revenue during the same period, illustrating that revenue share and profit mix can point to different winners.

Samsung: Scale and an HBM4 Catch-Up

Samsung held approximately 21% of HBM in the first quarter of 2026, compared with its 38.6% share of the broader DRAM market. That gap explains why Samsung’s total memory scale has not translated into HBM leadership.

Samsung’s HBM4 ramp could narrow the difference. In July 2026, the company reported raising HBM4 manufacturing yield to 80%, expecting HBM4 to account for more than 60% of its HBM sales in the second half, and targeting an overall HBM share of about 38% by year-end. Those are company targets and reported production estimates, so investors should track actual shipments and customer qualifications rather than assuming the target has already been reached.

Micron: The U.S.-Based Alternative

Micron held about 21% of HBM in the first quarter, approximately matching Samsung despite its smaller position in total DRAM. Micron has said it intends to align its HBM share with its broader DRAM share, which was 22.4% in the first quarter of 2026. That approach suggests a controlled expansion rather than an attempt to overtake SK Hynix through maximum volume.

Micron’s trade-off is capacity allocation. More HBM output consumes wafers that could otherwise support DDR5, GDDR, or LPDDR. The company must balance a high-margin accelerator opportunity against the risk of leaving conventional customers undersupplied during a period of record pricing.

DDR5 Server DRAM and the Capacity Squeeze

DDR5 is installed as separate chips on dual inline memory modules, including RDIMMs used in servers. The modules connect to the CPU through narrower memory channels than the wide interfaces used by HBM. They provide more flexible and replaceable system capacity, but they cannot match HBM’s accelerator-side bandwidth.

AI inference still needs large amounts of server DRAM. CPUs handle request scheduling, tokenization, networking, tool execution, retrieval, logging, and preprocessing. DDR5 can also hold model shards or key-value cache data that does not fit in accelerator memory. A system with expensive GPUs can underperform if its CPU memory capacity and bandwidth are too small for the surrounding workload.

MRDIMM is one response to the CPU memory bottleneck. Micron describes its DDR5 MRDIMM as supporting up to 8.8K MT/s and delivering as much as 39% more bandwidth for suitable workloads. Intel has positioned MRDIMM support in Xeon 6 for memory-intensive HPC and AI systems. Buyers receive more CPU-side bandwidth, but the modules do not replace HBM because they remain attached through the CPU memory subsystem.

Samsung generated $37.4 billion in DRAM revenue in the first quarter of 2026, a 95.4% increase from the preceding quarter. SK Hynix generated approximately $28.0 billion, while Micron generated $21.7 billion. The resulting shares were 38.6%, 28.8%, and 22.4%, respectively, based on the Omdia figures.

China’s CXMT reached fourth place with 7.6% of the market, up from 4.7% in the preceding quarter. Its revenue increased from $2.5 billion to $7.3 billion. CXMT’s expansion is concentrated outside HBM, but it adds competitive pressure in conventional DRAM and could limit how long the established suppliers retain current pricing power.

The production relationship between HBM and DDR5 explains the price surge. Producing a saleable amount of HBM uses roughly three times the wafer capacity required for an equivalent amount of standard DDR5. Capacity shifted toward HBM therefore reduces the output of conventional DRAM even when total wafer starts remain stable.

TrendForce reported that conventional DRAM contract prices rose approximately 90% to 95% quarter over quarter in the first quarter of 2026. Server DRAM increased about 88% to 93%, while blended PC DDR4 and DDR5 prices increased 105% to 110%. TrendForce subsequently projected another 58% to 63% conventional DRAM increase for the second quarter.

Those increases benefit producers in the short term but create demand risk. Server manufacturers can pass some component inflation to customers, while consumer PC and device makers face more price-sensitive buyers. Capacity added in response to unusually high prices can also produce a later oversupply. HBM demand has changed the cycle’s composition, but it has not removed the industry’s exposure to supply swings.

GDDR6, GDDR7, and Cost-Sensitive Inference

GDDR uses individual memory packages installed around a processor on a graphics or inference card. This design is physically simpler than stacked HBM because it does not require vertical DRAM stacks placed beside the accelerator on a silicon interposer. The board needs more space and the memory interface consumes more power, but packaging costs are lower.

That trade-off makes GDDR6 and GDDR7 useful for inference cards that need substantial bandwidth without the cost of HBM. Small and medium models, edge servers, graphics workloads with inference features, and cost-focused accelerators can use GDDR when the model and active cache fit within the available card memory.

GDDR becomes less attractive as model size, context length, and batch volume increase. Separate board-level packages cannot provide the same bandwidth density as HBM, and adding more packages increases board complexity and power use. HBM therefore remains the preferred choice for high-end accelerators, while GDDR occupies a lower-cost tier.

Samsung, SK Hynix, and Micron produce GDDR7. Their total DRAM shares of 38.6%, 28.8%, and 22.4% provide a useful measure of manufacturing scale, though they are not GDDR-specific shares. Samsung’s GDDR7 work includes PAM3 signaling, while Micron has discussed stacking GDDR modules for AI applications. These supplier statements point to continued development but should not be treated as evidence that GDDR will displace HBM in premium accelerators.

Mordor Intelligence estimated the GDDR7 market for AI inference GPUs at $0.89 billion in 2026 and projected it to reach $5.03 billion by 2031, equal to a 41.4% compound annual growth rate. The projection assumes increasing use in data-center and edge inference. It remains a forecast, and the outcome will depend on how accelerator designers divide workloads between GDDR-equipped cards, HBM-equipped processors, and lower-power integrated systems.

LPDDR5X, Edge AI, and Low-Power Data Centers

LPDDR is designed to reduce power consumption and occupy less physical space. It is commonly soldered close to a processor instead of being installed in replaceable DIMM slots. This tight integration reduces flexibility but improves power efficiency and supports compact system designs.

Edge inference uses LPDDR5X because mobile devices, compact computers, and embedded systems operate within strict battery or thermal limits. The same efficiency has become attractive in data centers, where processor racks can be limited by available electrical power before they run out of floor space.

Nvidia’s Grace-class processors use LPDDR5X, and Nvidia has claimed memory bandwidth of up to 1.2TB/s for its Vera CPU while using half the power of a general-purpose CPU. That statement is a vendor claim tied to a specific platform rather than a broad LPDDR performance guarantee.

Micron’s 256GB SOCAMM2 module provides another data-center example. In its March 2026 announcement, Micron said the module uses one-third the power and one-third the footprint of standard RDIMMs, supports 2TB of LPDRAM per eight-channel CPU, and can improve time to first token by more than 2.3 times when long-context inference uses LPDDR for key-value cache offload. These results come from Micron’s own testing and require independent workload-level validation.

Samsung, SK Hynix, and Micron are the principal LPDDR suppliers. Their total DRAM shares provide a scale benchmark, but LPDDR-specific quarterly supplier percentages were not part of the cited Omdia table. CXMT is also developing newer low-power memory and was reported to have nearly completed LPDDR6 verification at 12.8Gbps, with mass production potentially beginning in the second half of 2026.

LPDDR5X contract prices increased approximately 78% to 83% quarter over quarter in the second quarter of 2026, according to TrendForce figures cited by TNW. The increase shows how data-center adoption can affect mobile and consumer-device supply. A memory product once associated mainly with smartphones is now competing for capacity with tightly integrated AI systems.

NAND Flash, SSDs, and Persistent AI Context

NAND differs from every DRAM category because it is nonvolatile. DRAM must be refreshed continuously and loses its contents when power is removed. NAND retains data, making it suitable for SSDs that store model files, retrieval indexes, datasets, logs, and persistent user context.

NAND is slower than HBM, DDR5, GDDR, and LPDDR, so accelerators do not normally execute inference directly from SSD storage. Instead, data moves from NAND into faster memory. Storage speed still affects model loading, checkpoint movement, retrieval latency, and the ability to move inactive context out of expensive DRAM.

Long-running agents increase the importance of this tier. Tool outputs, documents, browser state, retrieval data, and conversation history cannot all remain in HBM. SSDs provide a lower-cost capacity layer, while software determines which data stays close to compute and which data can be moved to persistent storage.

Counterpoint Research’s first-quarter 2026 revenue table placed Samsung at 29%, SK Hynix at 18%, Kioxia at 14%, and Micron, SanDisk, and YMTC at 13% each. The total market expanded 90% quarter over quarter as prices rose.

The second-quarter shipment ranking shifted. Samsung retained first place with 25%, SK Hynix reached 22%, and YMTC moved into third place with 14%. Micron followed at 13%. Shipment share and revenue share measure different things, so the Q1 and Q2 figures should not be read as a direct quarter-to-quarter loss of four percentage points for Samsung. Higher-value enterprise products can produce a larger revenue share than unit or bit shipments suggest.

A separate first-quarter revenue estimate compiled from TrendForce, Counterpoint, and IDC figures placed Samsung at $13.51 billion and 31.6%, SK Hynix and Solidigm at $7.53 billion and 17.6%, and Micron, Kioxia, and SanDisk at 13.9% each. The variation from Counterpoint’s 29% figure reflects differences in market definition and measurement. Using one source consistently is essential when comparing quarter-to-quarter movement.

SanDisk became a standalone flash and SSD company after separating from Western Digital in 2025. Western Digital retained the hard-drive business. SanDisk’s data-center SSD revenue grew by more than 200% quarter over quarter in the first quarter of 2026, according to The Motley Fool’s compilation. Kioxia and SanDisk also continue to work together on BiCS NAND manufacturing.

SK Hynix’s NAND position includes Solidigm, its U.S. subsidiary. That grouping matters when reading supplier tables because a ranking that separates Solidigm from SK Hynix will produce a different apparent share. Investors should also distinguish NAND manufacturers from SSD brands, controllers, and hard-drive companies. Western Digital’s post-separation business does not have the same NAND exposure as SanDisk.

Manufacturer Profiles Across the Five Memory Types

Samsung Electronics

Samsung has the widest scale. It led total DRAM with 38.6% of first-quarter 2026 revenue and led NAND shipments with 25% in the second quarter. It also produces HBM, GDDR, and LPDDR. Its weakness is relative rather than absolute: its approximately 21% HBM share trails SK Hynix by a wide margin.

The investment case depends on whether Samsung converts its manufacturing scale into qualified HBM4 volume. Higher HBM yield would improve product mix, but aggressive expansion could also add supply and reduce industry pricing. Samsung’s conventional DRAM and NAND positions provide diversification that SK Hynix’s HBM-heavy mix does not.

SK Hynix

SK Hynix is the strongest pure exposure to high-end accelerator memory. Its approximately 58% HBM share, 28.8% total DRAM share, and 22% of second-quarter NAND shipments give it positions across volatile and nonvolatile memory. Solidigm adds enterprise SSD exposure.

The trade-off is concentration in the product carrying the highest expectations. Any delay in HBM4 qualification, customer platform demand, or advanced packaging would affect the company more directly than Samsung. Its 72% first-quarter operating margin also establishes a difficult comparison base for later periods.

Micron Technology (MU)

Micron held 22.4% of total DRAM revenue and approximately 21% of HBM in the first quarter of 2026. It held 13% of second-quarter NAND shipments. It is the only U.S.-headquartered producer among the three leading DRAM and HBM manufacturers.

Micron’s HBM share is close to its total DRAM position, matching management’s stated allocation goal. That balance reduces dependence on one memory category but also limits the upside available from chasing HBM volume regardless of cost. Micron remains exposed to the same capacity-allocation problem as its competitors: HBM growth can constrain DDR5, GDDR, and LPDDR supply.

Kioxia and SanDisk

Kioxia and SanDisk focus on NAND rather than DRAM or HBM. Each held about 13% to 14% of the first-quarter NAND market, depending on the source and measurement. Their exposure is therefore tied to enterprise SSDs, consumer storage, pricing per bit, and the demand for persistent AI data.

This focus removes HBM upside but also avoids the capital and qualification risks attached to accelerator memory. SanDisk’s strong data-center SSD growth shows that inference can benefit storage suppliers even when they do not manufacture accelerator-attached DRAM.

CXMT and YMTC

CXMT is the rising Chinese DRAM producer, while YMTC is the corresponding challenger in NAND. CXMT reached 7.6% of first-quarter DRAM revenue, and YMTC reached 14% of second-quarter NAND shipments.

Both companies can place pricing pressure on established suppliers in mainstream categories. Their ability to move into the most advanced products is affected by export controls that restrict access to certain manufacturing equipment. Their expansion remains one of the clearest downside risks for commodity DRAM and NAND pricing.

Industry Outlook if AI Inference Demand Keeps Growing

HBM should continue taking a larger share of DRAM revenue if demand for premium accelerators remains strong. Micron projected that the HBM market could rise from about $35 billion in 2025 to approximately $100 billion in 2028. That forecast implies growth much faster than conventional memory, though the exact path will depend on accelerator shipments, advanced packaging capacity, and HBM4 production yields.

SK Hynix’s share should decline gradually from its unusually high starting point as Samsung and Micron add qualified supply. A lower percentage would not necessarily mean lower HBM revenue because the total market is expanding. Samsung has the greatest opportunity to gain share if its reported HBM4 yield improvement converts into customer shipments. Micron can maintain a position near its broader DRAM share without taking the execution risks associated with maximum-volume expansion.

Conventional DDR5 volume should grow with server installations, but its share of industry revenue can fall as HBM commands more value per bit. Pricing remains supported while producers divert wafers to HBM. The eventual risk is that new DRAM capacity and CXMT expansion arrive after demand growth slows, producing excess supply in standard memory before HBM becomes oversupplied.

GDDR7 should expand as inference hardware splits into premium HBM accelerators and lower-cost board-level cards. The estimated increase from $0.89 billion in 2026 to $5.03 billion in 2031 provides a measurable demand case. GDDR’s addressable market will remain smaller than total DRAM because it is designed for a narrower set of devices.

LPDDR should gain data-center revenue as CPU and integrated accelerator designs place more weight on bandwidth per watt. The 78% to 83% quarterly price increase in Q2 2026 shows that adoption is already colliding with constrained supply. CXMT’s entry into newer low-power memory could add capacity, though qualification and export restrictions will influence how quickly it competes outside China.

NAND should benefit from larger model repositories, retrieval databases, persistent agent state, and enterprise SSD deployments. Revenue growth will depend on product mix. Enterprise SSDs carry different economics from consumer flash, so suppliers that increase data-center exposure can outperform the broader NAND bit market even without gaining shipment share.

Risks for Investors and Infrastructure Buyers

The first risk is capital-cycle reversal. High prices encourage more manufacturing investment, but memory fabrication has long construction and qualification schedules. Capacity ordered during a shortage can enter production after demand growth slows, pushing prices down quickly.

The second risk is customer concentration. HBM depends on a smaller group of accelerator designers and cloud operators than standard DRAM or NAND. A platform delay, inventory correction, or change in accelerator architecture can affect supplier allocations before broader AI demand changes.

The third risk is packaging. Producing the DRAM dies does not create a completed HBM-equipped accelerator. The stacks must be assembled and integrated with processors through advanced packaging. A shortage in interposers, bonding, substrates, or qualified packaging can leave memory capacity without a matching route into finished systems.

The fourth risk is Chinese supply. CXMT and YMTC are expanding from different positions, but both can pressure mainstream pricing. Export restrictions constrain their path into the most advanced products while leaving room to add capacity in categories where mature manufacturing tools remain sufficient.

The fifth risk is valuation. Benzinga reported that Samsung, SK Hynix, Micron, and other memory companies lost more than $2 trillion in combined market capitalization after their late-June highs. The selloff showed that record revenue and strong demand do not prevent sharp corrections when investors fear additional supply or slower spending.

Infrastructure buyers face a related procurement risk. Ordering GPUs without matching HBM allocation, server DRAM, and enterprise SSD capacity can create an unbalanced system. Procurement plans should specify memory capacity, bandwidth, power, and storage requirements at the workload level rather than treating memory as an interchangeable line item.

Investment Readout: Who Leads Each Part of AI Memory

SK Hynix leads the segment with the closest link to premium AI accelerators. Its approximately 58% HBM share gives it the strongest direct exposure to high-bandwidth inference, but also makes it more sensitive to HBM pricing, customer qualification, and accelerator demand.

Samsung leads the broadest set of memory markets. It ranks first in total DRAM and NAND while participating in HBM, GDDR, and LPDDR. Its main upside comes from closing the HBM gap. Its wider product mix also means conventional memory pricing has a greater effect on overall results.

Micron provides balanced exposure across HBM, conventional DRAM, GDDR, LPDDR, and NAND. Its HBM position is stronger than its late entry might suggest, but it remains smaller than Samsung and SK Hynix in total scale.

Kioxia and SanDisk provide focused exposure to persistent storage. They benefit when AI inference requires more enterprise SSD capacity, but they do not participate directly in HBM economics. Solidigm gives SK Hynix another route into the same enterprise storage opportunity.

CXMT and YMTC are the competitive variables that investors should monitor most closely. Their increasing shares do not yet remove the big three’s control of advanced DRAM and HBM, but they can affect commodity pricing and capacity discipline. In a market where a few percentage points of share can move billions of dollars in revenue, their expansion matters even before they reach the technical frontier.

The 2026 memory hierarchy has a clear set of leaders: SK Hynix in HBM, Samsung in total DRAM and NAND, the big three collectively in GDDR and LPDDR, and a more contested NAND market that includes Kioxia, SanDisk, Solidigm, and YMTC. The strongest producer depends on which physical bottleneck matters most to the workload. Premium accelerator inference points to HBM and SK Hynix. Server scale favors Samsung’s broader DRAM position. Power-limited deployments increase the value of LPDDR. Persistent context and retrieval expand the opportunity for NAND suppliers.

Related Reading

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• Aztech Global: Asset Sales Mask a Shrinking Core

Sources and References

Sources cited while researching and writing this article:

• Samsung Leads DRAM Market Share at 38.6%: SK hynix Trails on Revenue …
• Rapid Contract Price Surge Drives 1Q26 DRAM Industry Up 81 …
• Counterpoint Research
• GDDR7 For AI Inference GPU Market Size & Share Analysis – Growth Trends …
• Global NAND Memory Market Share: Quarterly
• Ranked: The World’s Largest Memory Chip Manufacturers